1. Field of the Invention
The present invention generally relates to a method and Code-Division-Multiple-Access (CDMA) receiver for a mobile communication system and, more particularly, to a method and CDMA receiver for removing a direct current (DC) component from a received CDMA signal.
2. Description of the Prior Art
Presently, Code-Division-Multiple-Access (CDMA) communication is widely used in mobile communication systems. CDMA refers to a type of radio communication using a spread-spectrum technique.
In operation, a transmitter modulates data with a spreading code sequence into a spread data, which is transmitted over a radio frequency (RF) link. In order to recover the data, the receiver must de-spread the spread data by using the same spreading code sequence as used by the transmitter.
The spreading code sequence comprises strings of bits (typically referred to as "chips") which are multiplied with the data bits prior to transmission. Various spreading code sequences are known, such as, for example, Maximum Length Code or Maximum Length Sequence series, sometimes referred to simply as "M series" as well as "Gold code series". Ideally, a spreading code sequence should be balanced in its repetition period. That is, the occurrence of a positive chip "+1" should be substantially equal to that of a negative chip "-1" in the repetition period of the spreading code sequence. Generally, one symbol is equal to one bit, with the chip being the time interval of the spreading code. It is noted that logical values "1" and "0" of the signal line 22 in FIG. 4 represent the positive chip "+1" and the negative chip "-1", respectively.
If the spreading code is not balanced, the received signal will include a direct current (DC) offset component having an amplitude corresponding to the imbalance. This is problematic and will cause faulty communications. A typical value of the DC offset is within a predetermined range of normally 2% of the received signal power based on design specifications and on degradation caused by the system.
FIG. 5 is a schematic block diagram for showing an example of a conventional CDMA receiver described in Japanese Laid-Open Patent Application No. 2-47911.
The receiver comprises an antenna 11 for receiving a transmitted signal from a CDMA transmitter (not shown), a quasi-sync detecting circuit 12 for converting this received signal into a baseband signal, and a capacitor 19 for removing a DC component from the baseband signal.
The receiver further comprises an analog-to-digital (A/D) converter 13 for converting a signal from which the DC component has been removed into digital data, a de-spreading code generating circuit 16 for generating a de-spreading code identical to the spreading code sequence used by the transmitter, a de-spreading circuit 14 for de-spreading the digital data by employing the de-spreading code, and also a clock generating circuit 17 for generating a clock required in the respective portions of the receiver. The code sequence generated by circuit 16 is a fixed periodical sequence for each channel. Preferably, the period of the code sequence is equal to one symbol time of the transmitted data. However, the period of the code sequence may be longer than one symbol time.
With this arrangement, the RF signal received by the antenna 1 1 is input into the quasi-sync detecting circuit 12 to be converted into a baseband signal. After the DC component of this baseband signal has been removed by the capacitor 19, the resultant baseband signal is input into the A/D converter 13 and converted into a digital signal. The output signal 23 of the A/D converter 13 is a baseband signal based on the digital signal, and this output signal is inputted into the de-spreading circuit 14 in order to be de-spread. In this case, the output signal 23 is de-spread by utilizing a replica of the spreading code produced from the de-spreading code generating circuit 16. The reception data is outputted from the circuit by this de-spreading process.
A problem of the conventional CDMA receiver of FIG. 5 is that, since the DC component is removed by the capacitor 19 prior to the A/D converter, any DC offset contributed to the signal by the A/D converter 13 cannot be removed.
Another problem is that any DC component which is actually part of the original signal and should therefore be included in the recovered signal is also removed, resulting in signal deterioration.
Referring now to FIG. 6, there is shown a block diagram of a second example of a conventional CDMA receiver. Equivalent parts to those of FIG. 5 are indicated by the like reference numerals for simplicity.
A major difference between the receiver shown in FIG. 5 and that shown in FIG. 6 is that FIG. 6 receiver does not require the capacitor 19, but instead includes a DC offset removing circuit 18 which removes the DC component from signal 23 after the A/D-converter 13 has converted the analog signal into a digital signal. Thereafter, the signal is de-spread by circuit 14 as before.
In this arrangement, the RF signal received by the antenna 11 is inputted into the quasi-sync detecting circuit 12 to be converted into a baseband signal. The baseband signal is inputted into the A/D converter 13 and is converted into a digital baseband signal. The digital baseband signal 23 which is output from the A/D converter 13 is input to the DC offset removing circuit 18, so that the DC offset component is removed. Then, the DC-free signal is input into the de-spreading circuit 14 to be de-spread. In this case, this signal is de-spread by using a replica 22 of the spreading code sequence generated in the de-spreading code generating circuit 16. The reception data is outputted by this de-spreading operation symbol-by-symbol.
Referring to FIG. 7, the DC offset removing circuit 18 shown in FIG. 6 is explained in greater detail. The DC offset removing circuit 18 comprises a low-pass filter (LPF) 25 for removing a signal component other than the DC component, and an adder 27 for inverting this removed signal and for adding the inverted signal to the signal 23.
With this arrangement, the digital baseband signal 23 outputted from the A/D converter 13 is inputted, via the adder 27, to the low-pass filter 25. The output of the adder is a DC-offset suppressed signal. With the LPF 25, the signal components other than the DC component are removed from the output of the adder 27. The output signal of the LPF 25 becomes a predicted value of the DC drift included in the digital baseband signal, and this predicted value is inverted and then inputted to the adder 27. As a result, the signal from which the DC offset component has been removed is outputted from the adder 27. It is noted that FIG. 7 substantially illustrates a high-pass filter.
The conventional CDMA receiver of FIG. 6 has several problems. First, this receiver has increased power consumption due to the additional DC offset removing circuit. Specifically, the DC offset component is removed from the signal before the de-spreading operation is performed, and therefore the clock corresponding to the chip rate of the spreading code sequence must initiate the DC offset removing circuit. Thus, the additional semiconductor elements of the DC offset removing circuit operate at high speed, thereby increasing power consumption.
Another drawback is that when the spreading codes are varied in each symbol of the data. Namely, when the repetition of the spreading code sequence is longer than a data interval, the DC offset component cannot be removed correctly, because the DC offset component varies data-by-data.
Particularly, when the code sequence whose repetition period is long relative to a symbol period of the transmitted data (e.g., much longer than the data symbol period) and this spreading code sequence is changed data-by-data, the DC offset component produced in response to the code balance (or imbalance) of the spreading code sequence being used is changed received data-by-received data. Then, the DC offset component is insufficiently removed in the conventional DC offset circuit, shown in FIG. 7, for removing the predicted DC offset component.